Why Does the Crystal Oscillator Frequency Have a Decimal Point? Unveiling the System Frequency Division Logic Behind 11.0592MHz and 32.768kHz

Crystal oscillator is an invisible "heartbeat regulator" in electronic devices, from smart watches to communication base stations, all circuits that require timing synchronization cannot do without it. When we look at crystal oscillator parameters in our daily lives, we always find that many frequencies have a series of decimal points, such as 1.8432MHz, 11.0592MHz, 25.000625MHz. Why aren't they regular integers? These frequencies with decimal points are actually a direct reflection of the design logic of the entire clock system.

1. The birth of natural frequency of crystal oscillator: starting from the crystal itself

The core of a crystal oscillator is a precision processed quartz chip, whose fundamental frequency has been determined from the production process and is mainly influenced by four physical factors:

The characteristics of the material itself: commonly used quartz crystals (silicon dioxide) have stable piezoelectric effects, and quartz of different purities can affect the inherent properties of vibration, but their impact on frequency values is far less direct than processing parameters.

Cutting method and angle: Quartz crystals need to be cut into crystal pieces at a specific angle. The most commonly used AT cutting method is to control the cutting angle to achieve the best frequency stability of the crystal oscillator at room temperature; Different cutting angles will directly change the vibration mode of the crystal, ultimately resulting in different fundamental frequencies.

The size of the chip: The vibration frequency of the crystal is directly negatively correlated with its size: the larger the size, the longer the wavelength of the vibration, and the lower the frequency; Conversely, the thinner and smaller the chip is cut, the higher the achievable vibration frequency. For example, the common 32.768kHz tuning fork crystal oscillator can only obtain this precise low frequency by processing crystals of specific sizes according to the shape of the tuning fork.

Post production calibration and matching: After production is completed, manufacturers will also calibrate the frequency by adjusting the load capacitance and fine-tuning the chip thickness to ensure that the final output is consistent with the nominal value, and ultimately control the frequency error within the ppm range required by the design.

That is to say, the fundamental frequency of a crystal oscillator is essentially the result of physical processing, and the nominal frequency we see is the final value obtained by combining design requirements and processing capabilities. So why are many nominal frequencies not integers? This is directly related to the design requirements of the circuit system.

2. To meet the requirements of integer frequency division and eliminate communication errors

Most crystal oscillator frequencies with decimal points are derived in reverse to meet the integer requirements of frequency division. The crystal oscillator itself is only a reference for the entire clock system, and the backend circuit often needs to divide the frequency of the crystal oscillator to obtain its desired operating frequency. If the integer frequency cannot be obtained after division, it will result in cumulative errors, ultimately leading to communication errors.

The most typical example is the baud rate design for serial communication. The standard baud rate we commonly use is 115200bps. According to the formula "baud rate=system clock frequency/division factor", if an integer 2MHz crystal oscillator is used, the calculated division factor is about 17.36. If it is not an integer, the actual baud rate after division will have an error of more than 2%, which is enough to cause errors in serial port reception. But if the crystal oscillator frequency is changed to 1.8432MHz, the calculation shows that 1.8432MHz ÷ 16=115200bps, which is exactly the standard baud rate without any error. Similarly, 11.0592MHz has the same design logic, which can obtain all commonly used serial port baud rates such as 9600bps, 19200bps, 115200bps, etc. through integer division, naturally becoming a classic frequency point with decimal points.

3. Adapt to binary frequency division system, with unique internal regularity and appearance

Many embedded systems and crystal oscillators in the field of industrial control have frequency designs that revolve around integer powers of 2, resulting in irregular looking decimals. Binary frequency division is the simplest frequency division method in digital circuits. By continuously dividing the frequency by two, different levels of clocks can be obtained. It is not only simple to implement, but also does not produce errors.

For example, the frequency of 20.48MHz can be divided into 2048 × 10kHz. 2048 itself is the 11th power of 2, and only 11 consecutive binary divisions are needed to obtain a 10kHz reference clock. Continuing the division can also obtain a 1Hz second signal. The entire process is an integer operation without any errors. Similarly, the real-time clock (RTC) we commonly use uses 32.768kHz, which essentially follows this logic: 32768 is the 15th power of 2, and after 15 rounds of division by two, it produces a 1Hz second pulse, perfectly meeting the timing requirements. If we replace it with an integer of 32kHz, we won't be able to obtain an accurate 1-second signal for subsequent frequency division, and we won't be able to accurately time it. These frequencies appear very regular from within the system, but when converted to MHz or kHz units, they become numerical values with decimal points.

4. Adapt PLL frequency synthesis to match high-speed interface protocol requirements

Modern SoC chips and high-speed communication devices almost all use PLL (Phase Locked Loop) for frequency synthesis. Crystal oscillators only need to provide a stable low-frequency reference, and PLL then obtains various high-frequency clocks required by different modules through multiplication and division. And these high-speed modules often need to match the fixed frequency of the standard protocol, and the reverse derived crystal oscillator reference frequency will naturally have decimal points.

For example, the 74.25MHz pixel clock required for high-definition video systems is a fixed value specified by the high-definition display protocol; There is also a 156.25MHz reference clock required for 10 Gigabit Ethernet, which needs to be synthesized by PLL from the crystal oscillator reference frequency. In order to achieve accurate protocol frequency and the best jitter and phase noise performance after PLL synthesis, designers will reverse calculate the most suitable crystal oscillator reference frequency. The final result often contains multiple decimal places, such as 25.000625MHz, which is designed to meet the requirements of specific high-speed interfaces.

In addition, there are some special decimal frequencies that are designed to avoid electromagnetic interference or to continue the fixed design legacy of early communication protocols, which are essentially the result of "system requirements determining frequency design". Simply put, the decimal point on the crystal oscillator frequency is never arbitrarily designed. Behind each digit is the optimal choice made to meet system accuracy and reduce implementation difficulty. This is also a typical manifestation of "demand driven parameter definition" in electronic design.